Análisis comparativo del nivel de defectuosidad en los dispositivos de potencia SiC n-MOSFETs.

Abstract

Currently, the field-effect transistors (MOSFETs) manufactured in silicon carbide (SiC) are an emerging technology that is entering the market for power devices, due to the enormous ben efits of this family of semiconductors regarding silicon (Si). Due to its vast energy bandgap, SiC shows several structural defects affecting the electrical characteristics of the devices directly. This article aims to determine the level of defectiveness inside the MOS structure in different devices under test. The technique used was the hysteresis characterization in continuous current, which is a measurement of the switching dynamics of traps inside the SiC/SiO2 interface. In order to achieve this purpose, two families of SiC MOSFET devices with different electrical characteristics were experimentally evaluated. The assessed devices belong to the same manufacturer. The level of defectiveness or estimated traps for each device marks a trend according to their capability of electrical characteristics and family.